This paper presents an exact expression for switch-induced error voltage which would cause a spike voltage on the output capacitor of the automatic conversion mode change （ACMC） charge pumps. The spike voltage will introduce several undesired problems--large output voltage ripple, serious frequency noise and low efficiency. Some methods used for reducing the spike voltage are provided by the proposed expression. An equivalent lumped model is used for deducing the expression. The ACMC charge pump circuit has been designed in SILTERRA 0.18/xm CMOS process. The experiment results show that the value of the spike voltage can match the expression well. Compared with three different improved versions, the spike voltage caused by the switch-induced error voltage can be reduced obviously.
Highly reliable bandgap-based under-voltage-lockout （UVLO） methods are presented in this paper. The proposed under-voltage state to signal conversion methods take full advantages of the high temperature stability characteristics and the enhancement low-voltage protection methods which protect the core circuit from error operation; moreover, a common-source stage amplifier method is introduced to expand the output voltage range. All of these methods are verified in a UVLO circuit fabricated with a 0.5 μm standard BCD process technology. The experimental result shows that the proposed bandgap method exhibits a good temperature coefficient of 20 ppm/℃, which ensures that the UVLO keeps a stable output until the under-voltage state changes. Moreover, at room temperature, the high threshold voltage VTH＋ generated by the UVLO is 12.3 V with maximum drift voltage of ±80 mV, and the low threshold voltage VTH- is 9.5 V with maximum drift voltage of±70 mV. Also, the low voltage protection method used in the circuit brings a high reliability when the supply voltage is very low.
This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators.A 40 V P-channel lateral double-diffused metal–oxide–semiconductor device whose drain–source and drain–gate can resist high voltage, but whose source–gate must be less than 5 V, is used as the high-side switch. The proposed driving circuit provides a stable and accurate 5 V driving voltage for protecting the high-side switch from breakdown and achieving low on-resistance and simple loop stability design. Furthermore, the driving circuit with excellent driving capability decreases the switching loss and dead time is also developed to reduce the shoot-through current loss. Therefore, power efficiency is greatly improved. An asynchronous buck regulator with the proposed technique has been successfully fabricated by a 0.35 μm CDMOS technology. From the results, compared with the accuracy of16.38% of the driving voltage in conventional design, a high accuracy of 1.38% is achieved in this work. Moreover,power efficiency is up to 95% at 12 V input and 5 V output.
Several improvements have been made to the conventional segmented linear light-emitting diode （LED） driver topology to enhance the performance and reliability of the system. A compensation technology is proposed to adaptively adjust the impedance of the sensing circuit to keep the output luminance constant in case of line volt- age variations. Based on the proposed technology, an active over temperature protection technique is presented to constrain the averaged LED current according to the junction temperature to prevent the driving IC from overheating. Otherwise, a pulse width modulation dimming circuitry which is compatible with input logic level ranging from 1.8 to 20 V is proposed. The proposed technologies are implemented in a 1.0μm 5/20/500 V BCD technol- ogy with three high voltage MOSFETs integrated on chip. The experimental results show that within 220± 15% V, 50 Hz AC line-voltage variation, the output luminance is restrained to 4% in total. The output luminance can also be effectively controlled by the PWM dimming circuitry, and a dimming range of 95% is achieved with good linearity.
