A novel onchip frequency compensation circuit for a voltagemode control DC/DC converter is pre sented. By employing an RC network in the two signal paths of an operational transconductance amplifier （OTA）, the proposed circuit generates two zeros to realize high closedloop stability. Meanwhile, full onchip integration is also achieved due to its simple structure. Hence, the number of offchip components and the board space is greatly reduced. The structure of the dual signal path OTA is also optimized to help get a better transition response. Im plemented in a 0.5 #m CMOS process, the voltage mode control DC/DC converter with the proposed frequency compensation circuit exhibits good stability. The test results show that both load and line regulations are less than 0.3%, and the output voltage can be recovered within 15 #s for a 400 mA load step. Moreover, the compensation components area is less than 2% of the die＇s area and the board space is also reduced by 11%. The efficiency of the whole chip can be up to 95%.
To drive the backplane of a liquid crystal display device and achieve different kinds of grey levels, a high-slew-rate operational amplifier with constant-gin input stage is presented. A Zener-diode structure is inserted between the tails of the complementary input pairs to keep the grn of the input stage constant. A novel slew rate enhancement circuit is implemented to achieve a very high slew rate. The chip has been implemented in a 0.5μm CMOS process and the chip area of the operational amplifier circuit is 0.11 mm^2. The testing results indicate that in the 5-8 V input range, the maximum gm fluctuation is only 4.2%. The result exhibits a high slew rate of 111 V/μs and 102 V/μs for the rising and falling edges under a 20 pF capacitance load, and the low frequency gain is up to 109 dB with a phase margin of 70 ℃.
In order to improve efficiency and reduce the output ripple, a novel multi-mode charge pump is presented. The proposed charge pump includes dual-loop regulation topology-skip and linear modes. It consumes low quiescent current in skip mode for light loads, and produces low ripple in linear mode for heavy loads, which closes the gap between linear mode and skip mode with active regulation; a multi-mode charge pump employing the technique has been implemented in the UMC 0.6-μm-BCD process. The results indicate that the charge pump works well and effectively; it has low ripple with special regulation, and minimizes the size of the capacitance, then decreases the area of the PCB board. The adjustable output of the positive charge pump is 10-30 V, and the maximum output ripple is 100 mV when the load current is 200 mA. The line regulation is 0.2%/V, and load regulation is 0.075%.
