The high temperature (300 ～480K) characteristics of the n-3C-SiC/p-Si heterojunction diodes (HJD) fabr icated by low-pressure chemical vapor deposition on Si (100) substrates are inv estigated.The obtained diode with best rectifying properties has 1.8×104 of ratio at room temperature,and slightly rectifying characteristics with 3.1 of rectification ratio is measured at 480K of an ambient temperature .220V of reverse breakdown voltage is acquired at 300K.Capacitance-voltage char acteristics show that the abrupt junction model is applicable to the SiC/Si HJD structure and the built-in voltage is 0.75V.An ingenious equation is employed to perfectly simulate and explain the forward current density-voltage data meas ured at various temperatures.The 3C-SiC/Si HJD represents a promising approach for the fabrication of high quality heterojunction devices such as SiC-emitter heterojunction bipolar transistors.
The designing approaches and key fabricating technologies for high frequency high power double dielectrics gate static induction transistor (DDG SIT) with mixed non-saturating I-V characteristics are presented.The effects of parasitic gate-source capacitance (C gs) on the power performance of SIT are discussed.The main methods and considerations to diminish C gs,consequently to improve the high power performance are given.Synchronous epitaxy technology is the critical step to decrease C gs.The 7-μm pitch DDG SIT delivering output power >20W with >7dB power gain and >70% drain efficiency at 400MHz,and delivering output power >7W with >5dB power gain and >50% drain efficiency at 700MHz are successfully fabricated.
The reverse snapback phenomena （RSP） on I-V characteristics of static induction thyristors （SITH） are physically researched. The I-V curves of the power SITH exhibit reverse snapback phenomena, and even turn to the conducting-state,when the anode voltage in the forward blocking-state is increased to a critical value. The RSP I-V characteristics of the power SITH are analyzed in terms of operating mechanism, double carrier injection effect, space charge effect, electron-hole plasma in the channel, and the variation in carrier lifetime. The reverse snapback mechanism is theoretically pro- posed and the mathematical expressions to calculate the voltage and current values at the snapback point are presented. The computing results are compared with the experiment values.
A cylindrical gates model of the static induction transistor is proposed and mirror method is used to calculate the distribution of electric potential.The results show that:the potential barrier is directly determined by channel over pinched-off factor;gate efficiency η decreases as the gate dimension α 2 and shifted gate voltage are minished,and what differs from the first-order theory is that η will tend to zero at the shifted gate voltage tends to zero when V D=0;at low current,the voltage amplification factor μ increases as the drain current rising.When the drain current reaches certain degree,the voltage amplification factor keeps almost constant.In the end,an analytical description of SIT’s characteristic suited to both triode-like and mixed I-V characteristics are obtained.The predicted I-V curves are consistent perfectly with the reported experimental ones.
